The RISC-V Summit Europe 2026 in Bologna brought together researchers, technology providers, semiconductor companies, software developers, and system integrators from across the growing RISC-V ecosystem. As the open instruction set architecture continues its rapid adoption across industries, the event provided an excellent opportunity to exchange ideas, showcase innovations, and discuss the future of open computing.

This year's summit demonstrated just how far the ecosystem has evolved. Conversations have moved beyond the question of whether RISC-V is viable for industrial applications. Instead, discussions increasingly focus on deployment, certification, observability, security, tooling, and the software infrastructure required to support production-ready systems.

We were delighted to contribute to the event through two poster presentations and a demonstrator pitch, showcasing our ongoing work within European research initiatives and our commitment to enabling reliable, safety-critical and industrial-grade RISC-V platforms.

Exploring Industrial RISC-V Adoption in Automotive Applications

Our first poster presentation, "Bringing Cloud-Connected Automotive Workloads to RISC-V: A CVA6-Based FPGA Case Study", explored an end-to-end automotive use case running on a CVA6-based RISC-V platform, focusing on cloud-connected workloads and real-world telemetry scenarios. By replaying CAN traces under increasing communication loads, the study evaluated system behaviour and performance characteristics under realistic operating conditions.

The results provided valuable insights into the readiness of open RISC-V platforms for industrial and automotive deployments. Equally important, the study highlighted areas where further optimisation and ecosystem development can help accelerate adoption in demanding embedded environments.

Advancing open and interoperable Trace Technology

Our second poster presentation, "C-Trace: An Open-Source RISC-V Trace Encoder and its Ecosystem", addressed another critical challenge for modern embedded systems: observability.

As embedded software grows in complexity, developers require powerful tracing capabilities to validate behaviour, optimise performance, and debug issues efficiently. While RISC-V has seen remarkable innovation in recent years, open and interoperable tracing solutions have remained comparatively limited.

Developed within the European TRISTAN project, C-Trace aims to address this gap through an open-source trace encoder and a broader ecosystem approach. The project introduces a modular architecture that supports continuous live observation of system behaviour while extending beyond traditional program-flow tracing.

One particularly interesting aspect of the work is the ability to enrich trace streams with additional runtime information such as timestamps, performance counters, direct data values, and hardware-assisted instrumentation events. These capabilities open opportunities for advanced use cases including worst-case execution time analysis, timing optimisation, coverage measurement, runtime verification, and control-flow integrity monitoring.

Demonstrating real-world RISC-V Software Platforms

On Thursday, we also participated in the TRISTAN session's demonstrator presentations with "PikeOS / ELinOS Stack on RISC-V and TRISTAN and ISOLDE Demonstrators."

The session provided an excellent opportunity to showcase practical implementation work and demonstrate how mature software platforms are enabling RISC-V adoption beyond research environments.

The demonstration highlighted the integration of PikeOS and ELinOS on RISC-V architectures and showcased results from the European TRISTAN and ISOLDE projects. Together, these initiatives are helping build the foundations required for dependable, secure, and certifiable RISC-V-based systems.

Seeing complete software stacks operating on RISC-V hardware helped illustrate the progress that has been made across the ecosystem. It is increasingly clear that success depends not only on processor cores, but also on the availability of operating systems, development tools, debugging infrastructure, middleware, and certification-ready technologies.

The Strength of the European RISC-V Community

Beyond the technical presentations, one of the most valuable aspects of the summit was the opportunity to engage with the broader RISC-V community.

The event brought together contributors from industry, academia, open-source projects, and European research programmes, creating an environment where collaboration naturally flourished. Discussions ranged from processor architectures and software tooling to certification strategies, automotive applications, cybersecurity, and embedded AI.

What became evident throughout the week is that the European RISC-V ecosystem is maturing rapidly. The focus is increasingly shifting from experimentation to deployment, with growing attention on reliability, interoperability, functional safety, and long-term maintainability.

This evolution aligns closely with our own work. As organisations begin deploying RISC-V in increasingly demanding applications, the supporting software ecosystem becomes just as important as the hardware itself. Operating systems, hypervisors, trace infrastructure, and development tools will play a critical role in enabling the next generation of industrial and safety-critical systems.

Looking ahead

RISC-V Summit Europe 2026 once again demonstrated the momentum behind open architectures and collaborative innovation.

We would like to thank the organisers, project partners, presenters, and everyone who stopped by our posters or attended the demonstrator session. The conversations, questions, and feedback we received were both insightful and encouraging.

As the ecosystem continues to grow, we look forward to contributing to future developments, advancing open technologies, and helping bring dependable, certifiable, and production-ready RISC-V solutions into real-world applications.