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Successful Completion of European project JEOPARD on Real-Time Java for Multi-Core Platform

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SYSGO, a leading supplier of certifiable operating systems, announced the successful completion of the JEOPARD project. SYSGO’s PikeOS Safe and Secure Virtualization RTOS has demonstrated its capacity in supporting multi-core hardware architecture as part of a more general project targeting real-time Java applications. A webinar, jointly organized on December 8, 2010 by SYSGO, aicas and Cassidian Electronics, one of the three Business Units of Cassidian (formerly EADS Defense & Security), an EADS company, presents an industrial implementation as a result of this project.

The JEOPARD project objectives were to provide tools for platform-independent development of predictable systems that make use of hybrid platforms consisting of multi-core microprocessors and FPGAs. Three industrial use cases were implemented:

  1. An avionics application by GMV, implementing an AOC (Airline Operational Centre) involving IMA/ARINC-653 compliance and developed according to DO-178B/EC-12B Level C.
  2. A Software Defined Radio application by RadioLabs, designed to simulate the operations performed in a UMTS system at the physical layer.
  3. A Radar application by Cassidian, based on performance requirements typically related to Airport Surveillance Radar (ASR).

More details of this Radar use case will be presented during the live webinar on December 8, 2010.

The evaluation of the Radar use case demonstrated the benefits of a JEOPARD based system and identified the possible improvement of JEOPARD. The radar data processing oriented tracking application turned out to be not only quite stable with aicas’ JamaicaVM on PikeOS but also faster than with OpenJDK on Linux. The evaluation results highlighted one crucial advantage of JEOPARD: It is possible to use the power of multi-core microprocessors for predictable, embedded systems without abandoning the merit of a platform-independent development. Parallelizing an algorithm on multiple cores increased the overall processing power without increasing the processor frequency or electrical power consumption.

“We are proud of our contribution to this ambitious project through the development of new functionality in our PikeOS and ELinOS products,” said Jacques Brygier, VP Marketing and JEOPARD project manager at SYSGO. “Our implementation of a POSIX® SMP personality combined with our standard Linux personality allowed our partner aicas to test different configurations of their real-time Java VM, and Cassidian to apply those configurations to a revised implementation of their advanced Radar application.”

One noteworthy objective of JEOPARD was to enable developers to easily integrate FPGAs with microprocessors in one system and to communicate between both devices in a convenient way using Java. This objective was accomplished. In the radar use case, a microprocessor sent data to an FPGA via PCIe, the FPGA processed the data and sent back the results to the microprocessor. JEOPARD's HW-Methods encapsulate the platform-specific communication and provide a functional interface to the Java developer.

JEOPARD fulfills the essential requirements and offers a high value to developers of predictable and embedded systems. Although some building blocks of JEOPARD have to be enhanced based on the findings of this evaluation, JEOPARD is ready to boost the platform-independent development of predictable and embedded systems.

About JEOPARD Project

JEOPARD is a project that brings together leading European suppliers of real-time technologies, research institutes and industrial users, to develop new real-time Java technologies for multi-core systems. About 3.3 million Euros have been invested in research and development for the project, which has successfully completed in October 2010.

The JEOPARD project is partially funded by the 7th framework program, an initiative of the European community to advance research and development of new technologies, applications and industries. The project will contribute to future standards for developing real-time Java and multi-core systems. Participants in the project are aicas, Cassidian Electronics, one of the three Business Units of Cassidian (formerly EADS Defense & Security), an EADS company, FZI, RadioLabs, GMV, Technical University of Cluj-Napoca, Technical University of Vienna, The Open Group, University of York, and SYSGO.

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