With RISC-V, SYSGO continues its commitment to support the latest open hardware instruction set architectures. RISC-V is an open source hardware instruction set architecture, driven by the non-profit RISC-V Foundation. It is rapidly being adopted by hardware vendors around the world and, according to media reports, research from Semico Research estimates its market size to grow to more than 60 billion CPU cores by 2025. Through its parent company Thales, SYSGO is a founding member of the RISC-V foundation and the open hardware group, supporting the ecosystem with its expertise in certifiable designs. The goal of the open hardware group is to define open hardware-based on RISC-V.
"More and more systems are being developed on RISC-V, and we are committed to offering our customers the choice of their preferred architecture", said Franz Walkembach, SYSGO's VP Marketing & Alliances. "With RISC-V support, we deliver on this promise and enable the use of this architecture even in the most critical environments."
SYSGO also announced that QEMU can also be used with PikeOS RISC-V architectures. QEMU is a popular open source hardware emulator which runs on all major desktop operating systems and can emulate the entire hardware of a computer system. Target architectures include x86, x64, PowerPC, ARM 32/64, SPARC and others and thus QEMU covers all architectures supported by PikeOS.
More information at www.sysgo.com/pikeos