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SYSGO @ FPGA Conference Europe

Events & Webcasts, PikeOS
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The FPGA Conference Europe in Munich from July 4th to July 6th proved to be a remarkable gathering of top-class FPGA experts, showcasing the latest advancements in programmable logic devices. Organized by ELEKTRONIKPRAXIS and the FPGA training center PLC2, this conference focused on delivering practical and user-oriented solutions that developers could readily integrate into their everyday work.

Field Programmable Gate Arrays (FPGAs) have emerged as flexible and powerful accelerator solutions in various high-performance applications, including AI-driven cloud data centers and telecommunications. The conference emphasized the importance of energy efficiency in flexible logic devices, particularly in small, low-power components that employ specialized production techniques or possess a limited number of programmable cells.

FPGAs are the "secret heroes" of microelectronics and play a pivotal role in embedded development. From energy-efficient sensor fusion solutions for the automotive industry to intelligent platforms for condition monitoring in networked factories and powerful deep learning accelerators in data centers: These flexible logic devices are instrumental in a wide range of applications, all of which were extensively discussed during the FPGA Conference Europe in Munich.

Integrated RTOS and Hypervisor Ecosystem for MPU and MMU-based Processors

Among the notable presentations, SYSGO delivered an enlightening talk on Day 1. The presentation delved into the challenges faced by heterogeneous SoC applications in various industries, such as industrial automation, robotics, medical technology, and mobility solutions.

The focus of the presentation centered around developing a homogeneous RTOS and real-time hypervisor solution that simplifies programming and payload balancing for heterogeneous SoCs with MMU- and MPU-based controllers. Traditionally, different APIs and RTOSs existed for each type of controller, making it challenging to operate subsystems and manage cache inferences in multi-core implementations seamlessly.

SYSGO's solution showcased virtually identical APIs for programming applications on processors with MMU or MPU, with only the memory management API being adapted accordingly. This significantly simplifies the development process and allows for easier code certification across both core variants. The presentation highlighted the potential for upcoming certifications to build upon existing SIL 4, DAL A, and ASIL D certifications, further streamlining the development of performance-balanced real-time systems.

The presentation also introduced the concept and benefits of FPGA virtualization in mixed-critical systems, which integrated applications with different levels of criticality on a single hardware platform. It discussed the challenges and requirements of FPGA virtualization, such as ensuring isolation, managing reconfiguration, and providing a uniform interface. It also presented some key techniques for FPGA virtualization, such as space-multiplexing and time-multiplexing. Furthermore, the presentation described a future work activity that involved a possible approach of FPGA virtualization on PikeOS using a time partitioning scheme. It concluded with some future directions for research and development.

Good Experience and professional Talks

The FPGA Conference Europe in Munich provided an excellent platform for FPGA enthusiasts, developers, and industry professionals to exchange knowledge and explore innovative solutions. The event demonstrated the immense potential of FPGAs in driving advancements across various sectors, and SYSGO's presentation showcased their commitment to delivering integrated and efficient solutions for heterogeneous SoC applications.

As the conference concluded, attendees left with a deeper understanding of the latest FPGA developments and the practical applications of these versatile devices. The FPGA Conference Europe continues to be a premier event, fostering collaboration, innovation, and knowledge-sharing within the FPGA community.